Jobs at Djinni

Join the Fintech Core team building a white-label modular platform that powers digital banks, payment systems, and fintech products across Europe, North America, and MENA regions
 

As a System Analyst on the Fintech Core project, you will define technical architecture, system specifications, and integration designs for a white-label modular fintech platform that enables rapid creation of digital banking and payment products.
 

The platform provides a complete technology stack including general ledger, middleware, mobile/web applications, and extensive third-party integrations for KYC, payments, card issuance, and compliance. You'll work closely with Business Analysts, Solution Architects, and Engineering teams to translate business requirements into detailed technical specifications, design robust system architectures, and ensure seamless integration across microservices while maintaining regulatory compliance and enterprise-grade security.

This role offers hands-on experience designing financial systems at scale, with exposure to payment processing, card networks, digital wallets, cross-border transactions, and regulatory compliance frameworks serving multiple fintech implementations globally.

Responsibilities
 

• Analyze and document system requirements for platform modules including payments, card issuance, digital wallets, accounts, ledger management, and compliance systems
• Translate business requirements into detailed technical specifications, API contracts, database schemas, and integration architectures
• Design data models, entity relationships, and data flow diagrams for transactional and financial systems with appropriate normalization and performance considerations
• Define integration patterns and technical specifications for connecting with payment processors, KYC/AML providers, card issuers, and open banking platforms
• Document system behaviors using sequence diagrams, component diagrams, deployment architectures, and API specifications (OpenAPI/Swagger)
• Collaborate with Solution Architects to ensure system designs align with microservices architecture patterns, scalability requirements, and technical best practices
• Define non-functional requirements including performance benchmarks, security controls, data retention policies, and audit trail specifications
• Facilitate technical design workshops with Engineering teams to review system specifications, validate implementation approaches, and identify technical risks
• Create comprehensive system documentation in Confluence covering technical flows, component interactions, message formats, and infrastructure requirements
• Support QA teams by defining system integration test scenarios, technical acceptance criteria, and end-to-end testing strategies
• Analyze system performance bottlenecks and propose optimization solutions for high-throughput financial transaction processing
• Ensure all technical specifications maintain regulatory compliance requirements (PCI DSS, GDPR, PSD2) and financial data security standards
• Maintain traceability between business requirements, system specifications, technical implementations, and test cases
• Participate in sprint planning, technical refinement sessions, and architecture review boards to ensure alignment between product vision and technical execution

Professional skills are required:
 

• 3+ years of experience as System Analyst, Technical Analyst, or similar role in fintech or banking domains

   

• Strong understanding of financial systems architecture including general ledgers, payment processing, and account management

   

• Experience with microservices architecture, API design, and distributed systems

   

• Proficiency in creating technical documentation: system design documents, data flow diagrams, sequence diagrams, ER diagrams

   

• Knowledge of database design and data modeling for transactional systems

   

• Understanding of integration patterns, message queues, and event-driven architectures

   

• Familiarity with payment systems standards (ISO 20022, SWIFT, SEPA, card schemes)

   

• Experience with API specifications (REST, OpenAPI/Swagger, webhooks)

   

• Understanding of cloud infrastructure and deployment architectures (AWS, Azure, GCP)

   

• Knowledge of authentication and authorization mechanisms (OAuth, JWT, API keys)

Technical Skills

• 3+ years of experience as System Analyst, Technical Analyst, or similar role in fintech or banking domains

• Strong understanding of financial systems architecture including general ledgers, payment processing, and account management

• Experience with microservices architecture, API design, and distributed systems
• Proficiency in creating technical documentation: system design documents, data flow diagrams, sequence diagrams, ER diagrams

• Knowledge of database design and data modeling for transactional systems

• Understanding of integration patterns, message queues, and event-driven architectures

• Familiarity with payment systems standards (ISO 20022, SWIFT, SEPA, card schemes)

• Experience with API specifications (REST, OpenAPI/Swagger, webhooks)

• Understanding of cloud infrastructure and deployment architectures (AWS, Azure, GCP)

• Knowledge of authentication and authorization mechanisms (OAuth, JWT, API keys)

   

Domain Knowledge

• Understanding of core banking concepts: accounts, transactions, balances, ledgers, reconciliation

   

• Knowledge of payment flows: domestic/international transfers, card payments, digital wallets

   

• Familiarity with KYC/AML processes and regulatory compliance requirements

   

• Understanding of financial data security standards (PCI DSS, GDPR)

   

• Experience with fintech product features: onboarding, card issuing, FX, acquiring

Analytical & Documentation Skills

• Excellent analytical thinking and problem-solving abilities

• Strong technical writing skills with attention to detail

• Ability to translate complex business requirements into technical specifications

• Experience with UML, BPMN, or similar modeling notations

• Proficiency with documentation tools (Confluence, Notion, or similar)

• Experience with requirements management and traceability

Skills will be a plus:
 

• Experience with white-label or multi-tenant system architectures

• Knowledge of blockchain and cryptocurrency integrations

• Familiarity with regulatory frameworks (PSD2, Open Banking, MiFID)

• Experience with performance testing and system optimization

• Understanding of DevOps practices and CI/CD pipelines

• Previous experience with modular platform architecture

• Knowledge of financial compliance and audit requirements

• Experience with data migration and system integration projects

Project description:

Fintech Core is a white-label modular fintech solution designed for rapid creation and launch of digital banking and payment products. It provides a comprehensive, turnkey platform that enables businesses to build neobanks, digital wallets, payment systems, and other fintech products within 3 months rather than years. The solution includes a complete technology stack: a robust general ledger platform, middleware layer, customizable frontend applications for iOS/Android/Web, and extensive third-party integrations for KYC, payments, card issuance, and compliance. Unlike traditional SaaS offerings, Fintech Core provides full access to source code, eliminating vendor lock-in and enabling deep customization.

The platform is built on microservices architecture with modular components that can be independently scaled and customized. It supports multi-currency operations, cross-border payments, card issuing, account management, transaction processing, compliance monitoring, and back-office orchestration. The solution is PCI & DSS compliant and designed to meet regulatory requirements across multiple jurisdictions.

Project stage: Active development and continuous enhancement. The platform is mature with multiple successful implementations but undergoes constant evolution to incorporate new regulatory requirements, payment integrations, and fintech capabilities. Quality, scalability, and compliance are paramount priorities.

The size and the structure of the PROJECT team:

Cross-functional team including Product Owners, Business Analysts, System Analysts, Frontend/Backend Developers, QA Engineers, DevOps, Security Specialists, and Compliance Consultants. The team operates in an Agile environment with close collaboration between technical and business functions.

We are looking for a junior backend VLSI engineer to join our Physical Design team.

This role is ideal for new graduates with strong academic foundations in digital design and VLSI who want to learn and execute a full RTL→GDSII implementation flow using Synopsys tools.

You will gain hands-on experience working on advanced semiconductor technologies, including nodes down to 7 nm, 5 nm, 3 nm, and 2 nm.

Responsibilities:

Assist in synthesis (Design Compiler / Fusion Compiler) from RTL to gate-level netlist

Support floorplanning, power planning, and clock tree design

Perform place and route (P&R) using ICC2 / Fusion Compiler

Contribute to timing analysis and closure using PrimeTime (STA)

Run physical verification checks: DRC, LVS, antenna, IR-drop, EM

Prepare and validate design constraints (SDC, clock definitions, I/O timing)

Help generate and validate physical deliverables (LEF/DEF, SPEF, SDF)

Collaborate with RTL, DFT, package, verification, and integration teams

Document design steps, results, and signoff data

Required Qualifications:

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or related field

Strong understanding of digital logic, synchronous design, and timing fundamentals

Academic exposure to VLSI backend flows

Basic familiarity with: synthesis, place & route, STA

Scripting skills (TCL, Python, Shell)

Strong analytical and problem-solving mindset

Motivation to learn deep-submicron implementation techniques (FinFET and GAA nodes)

Nice-to-Have Skills

Exposure to Synopsys tools (DC, ICC2, PT) through coursework or projects

Understanding of setup/hold timing, OCV, derates, clock uncertainty

Basic knowledge of physical effects: congestion, crosstalk, IR-drop, EM

Linux environment experience

Familiarity with Git or similar tools

What We Offer:

Hands-on work on advanced semiconductor nodes down to 2 nm

Full training in modern RTL→GDSII physical design flows

Mentorship from senior PD and STA engineers

Opportunity to work on high-performance ASICs and SoC designs

Clear growth path toward P&R specialist, STA engineer, PD lead, or chip integration engineer

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail
• High motivation to learn package design and SI/PI methodologies
• Nice-to-Have Skills
• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Verification Engineer to join our VLSI design and verification team.

This is an excellent opportunity for new graduates with strong academic training in digital design, verification methodologies, and SystemVerilog/UVM.

Responsibilities:

Develop and execute verification testbenches using Verilog/SystemVerilog and UVM

Implement functional and constrained-random tests for block-level and SoC-level designs

Create coverage models (functional, code, assertion-based) and drive coverage closure

Debug simulation failures, interface mismatches, and RTL issues

Write and maintain scoreboards, monitors, agents, drivers, and checkers in UVM

Review design specifications, extract test requirements, and build verification plans

Run regressions, triage failures, and document results

Collaborate closely with RTL designers, DFT, backend, and system architects

Required Qualifications:

B.Sc. or M.Sc. in Electrical/Computer Engineering or related field

Strong academic background in digital logic, computer architecture, and VLSI design

Hands-on experience with Verilog and SystemVerilog (labs, projects, internship)

Basic understanding of UVM methodology

Familiarity with simulation tools (VCS, QuestaSim, Xcelium or similar)

Ability to read and understand RTL code

Good analytical and debugging skills

Strong motivation to grow in advanced functional verification

Nice-to-Have Skills:

Coursework or project experience with UVM testbench development

Familiarity with assertion-based verification (SVA)

Basic scripting (Python, Perl, Shell, TCL)

Experience with coverage-driven verification

Exposure to SoC-level interfaces (AXI, PCIe, DDR, Ethernet, SPI, I2C)

What We Offer:

Full training in modern verification methodologies (UVM, SVA, CRV)

Work with cutting-edge IPs and SoC architectures

Mentorship from senior verification and architecture teams

Clear growth path toward UVM specialist, verification lead, or architect

We are looking for highly motivated junior engineers to join our Design-for-Test (DFT) team.

This is an excellent opportunity for graduates who want to build expertise in Scan, Memory BIST, and JTAG within advanced VLSI development.

Responsibilities:

Learn and support implementation of scan insertion and scan chain architecture

Assist in ATPG pattern generation and test coverage analysis

Participate in Memory BIST (MBIST) integration and verification

Work with JTAG / IEEE 1149.1 boundary scan concepts and flows

Help debug test-related issues at RTL and gate level

Collaborate with senior DFT engineers on SoC-level test strategy

Required Background:

Academic knowledge in digital logic, VLSI design, and computer architecture

Basic familiarity with DFT concepts: scan, ATPG, BIST, boundary scan

Understanding of Verilog or VHDL

Scripting basics (Python, TCL, Shell)

Good analytical and problem-solving skills

Strong motivation to learn industry-standard DFT tools and flows

What We Offer:

Full training in Scan, MBIST, JTAG, ATPG, and DFT methodologies

Mentorship by experienced DFT engineers

Exposure to advanced SoC development flows and signoff

Growth path toward senior DFT, test architecture, or silicon bring-up roles

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 14, 10, 8, 7 nanometers.

You will be responsible for digital logic design and verification. Besides, you'd be able to learn and improve related methodologies. Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are analytical thinking and ability to learn.

Essential qualifications:

-Degree in Electronics or related fields

-Good understanding of digital electronics

-Experience with EDA tools (Xilinx, Mentor Graphics, Synopsys or similar)

-Beginner’s level of English or higher

Optional qualifications you may have:

-FPGA design using HDL (Verilog, VHDL) or schematics editor

-IC design verification using System Verilog

-CPU architecture knowledge, embedded SW development

We offer:

-Full-time employment, flexible schedule

-On-job training in our Kyiv office with high skilled professionals

-Potential growth in directions of ASIC/FPGA design

-Social benefits, modern and comfortable office facilities

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

We’re looking for a Full-Stack Developer who doesn’t just write code - but builds products, solves real problems, and takes ownership.

If you enjoy working across the stack, shipping features end-to-end, and seeing the direct impact of your work - this role is for you!

 

💡 What you’ll be working with

• TypeScript as a core language
• React + Redux on the frontend
• Node.js + NestJS on the backend
• PostgreSQL for data management
• REST APIs and tools like Postman
• Docker & AWS for infrastructure

Nice to have:

• React Native / Firebase / Expo
   

🔥 What you’ll do

• Build features from idea → production
• Improve and scale an existing product
• Refactor and keep the codebase clean and maintainable
• Integrate third-party services and APIs
• Work side-by-side with PMs, QAs, architects, and developers

• Be part of releases and see your work go live

   

🌱 What matters to us

• You’re proactive and take ownership
• You care about clean, scalable code
• You’re comfortable communicating in English (Upper-Intermediate+)
• You’re always looking to learn and grow

🎯 What you’ll get

• Real impact - your work won’t be lost in layers of bureaucracy
• A team that values initiative, not micromanagement
• Space to grow both technically and professionally
• Flexibility - we tailor benefits to what actually matters to you
   

Our client is a leading global Financial market data provider who runs a change program aiming to migrate a set of legacy data connectors to a new strategic platform. The main driver is to deliver high-quality software that connects Financial Markets across the globe in a real-time, high frequency, and low-latency data management chain. The projects are technically challenging in an environment that is very engaging. Projects will utilize a multitude of different languages and skillsets with a focus on C++ and scripting languages.

We are looking for a C++ software engineer/developer with experience in implementation backend systems and services running under Linux, Cloud, ideally, with capabilities to deliver projects independently and coordinate work with BA, QA, Operational, and cross-functional application teams.

• Responsibilities:

  • Develop high-quality software, design, and functional documentation
  • Provide estimates for specific software feature implementation
  • Identify, prioritize, and execute tasks in the software development life cycle
  • Build unit tests for your code
  • Automate tasks through appropriate tools and scripting
  • Perform validation and verification testing
  • Collaborate with internal teams and vendors to fix and improve products
  • Ensure software is up-to-date with the latest technologies and standards

• Mandatory Skills Description:

  • 3+ years of full life-cycle software development experience
  • 3+ years of object-oriented development, in particular, C++
  • Experience developing under Linux
  • Ability to collaborate in a team-focused environment
  • Excellent analytical skills and a real passion for solving problems
  • English at the level of Upper-Intermediate (spoken)
  • Experience with Docker, AWS

• Nice-to-Have Skills Description:

  • Ability to suggest/research new technologies and quickly adapt to change
  • Experience working with Market Data and Trading

🌟 About SelfInspection

SelfInspection is a fast-growing AI-driven vehicle inspection platform transforming how leasing companies, fleets, and financial institutions process vehicle damage assessments.

We combine computer vision, automation, and modern cloud architecture to deliver scalable and intelligent inspection workflows.

We are building a robust, event-driven backend system — and we’re looking for a strong Senior Backend Engineer to help us scale it properly.

🧠 What You’ll Do

• Design and build scalable microservices using NestJS (TypeScript)
• Architect and maintain event-driven systems using Kafka / RabbitMQ
• Design clean domain-driven services (inspection flows, reports, billing, notifications)
• Work with PostgreSQL (schema design, optimization, migrations)
• Improve system reliability, observability, and performance
• Participate in architectural decisions (modular monolith vs microservices boundaries)
• Collaborate closely with frontend, QA, and AI teams
• Write clean, testable, production-ready code
• Help improve CI/CD and deployment pipelines (AWS environment)

🏗 Tech Stack

• Backend: NestJS (TypeScript)
• Architecture: Microservices, Event-Driven
• Messaging: Kafka and/or RabbitMQ
• Database: PostgreSQL
• Cloud: AWS
• Containerization: Docker
• CI/CD: GitHub Actions (or similar)
• APIs: REST (future: gRPC)

✅ Requirements

• 5+ years of backend development experience
• Strong experience with microservices architecture
• Hands-on experience with event-driven systems (Kafka or RabbitMQ)
• Deep knowledge of NestJS or Node.js backend frameworks
• Strong experience with PostgreSQL (indexes, performance tuning, transactions)
• Understanding of distributed systems challenges (idempotency, retries, eventual consistency)
• Experience designing APIs and maintaining clean contracts
• Startup mindset: ownership, autonomy, speed

🎯 Nice to Have

• Experience with Domain-Driven Design (DDD)
• Experience with inspection, insurance, fintech, or fleet systems
• Familiarity with Kubernetes
• Experience building high-throughput systems
• Knowledge of AI/ML service integrations

💼 What We Offer

• Work on a real AI product with global customers
• Strong technical ownership
• Fast-paced startup culture
• Flexible work schedule
• Competitive compensation
• Opportunity to shape architecture decisions

💡 Who Will Thrive Here

Someone who:

• Thinks in systems, not just endpoints
• Cares about architecture quality
• Can balance speed and correctness
• Takes ownership instead of waiting for tickets

Come Back Agency supports US software and technology companies by running their hiring process. We work with delivery and leadership teams to define roles, screen candidates, and manage interviews. Successful candidates are hired directly by the company and become part of its team.

Employer information:

This position is with a US-based software company providing custom development and AI implementation for North American clients. The team builds and maintains production software, including AI-enabled systems, and works in long-term client engagements. Team members operate as part of an internal, distributed team and collaborate directly with client stakeholders.

About the role:

We are looking for a detail-oriented content specialist to generate, structure, and publish content on our websites. This role is a great entry point for someone who is organized, curious, and comfortable working with AI tools and digital platforms.

You will produce website pages and blog posts using AI tools, prepare content for review, and publish it through our CMS. A US-based team member will review all content for final language and tone, so the focus here is on structure, clarity, and consistency — not perfect native English.

We will provide structured onboarding and clear guidelines, so prior experience in a content role is a plus but not required.

What you will do:

• Generate website pages and blog posts using AI tools based on briefs, outlines, or existing materials.
• Edit and refine AI-generated content to ensure it is clear, accurate, and well structured.
• Publish content to the website using our CMS, including formatting, internal links, headings, and basic SEO structure.
• Update and improve existing pages when needed.
• Coordinate with a US-based reviewer and apply feedback before content goes live.

What we are looking for:

• Strong written English — you can produce clear, professional text even if it will later be reviewed by a native speaker.
• Comfort using AI tools such as ChatGPT or similar, or a genuine interest in learning to use them for content work.
• Attention to detail and the ability to follow guidelines consistently.
• Basic familiarity with any CMS (WordPress, Wix, Notion, or similar) — or a willingness to learn quickly.
• Reliability and a structured approach to completing tasks.

No formal content experience is required if you can demonstrate the skills above.

Nice to have:

• Any hands-on experience writing or editing content, even personal projects, freelance work, or coursework.
• Familiarity with basic SEO concepts such as headings, meta descriptions, or internal links.
• Experience with software, tech, or digital services topics.

What we offer:

• Working hours aligned with US time zones, typically 16:00–00:00 Kyiv time.
• English lessons to support clear and confident communication.
• Paid vacation and sick days.
• Fully remote work.
• Structured, personalized onboarding to help you ramp up effectively.
• Opportunities for professional growth within the team.

How to apply

Send your resume and a short note about yourself — tell us what interests you about this role and share any examples of writing or content work if you have them. Personal projects, blog posts, or coursework are welcome.

You can apply through our website at comeback.ua. Selected candidates will be contacted by Come Back Agency.

We build a wireless handheld ultrasound (POCUS) device that connects to iOS/Android via a mobile app. This is a real hardware + software product in the medical domain, where reliability, performance and clean engineering practices matter.

What you’ll do

• Design, implement and test embedded C++ (C++17+) software for a handheld device
• Deliver new features and continuously improve architecture and code quality
• Write unit tests for low-level/embedded parts (tests are treated as product code)
• Participate in design discussions and code reviews in a supportive team culture
• Collaborate with cross-functional stakeholders (Product, UX/usability, clinical experts) to turn requirements into implementable solutions
• Optimize performance and resource usage (CPU/memory/power, depending on the area)
   

What we’re looking for

• 3–5+ years of commercial experience with modern C++ in an embedded context
• Degree in Computer Science, Engineering, Mathematics, or a related STEM field
• Strong fundamentals in software design and building maintainable systems
• Practical experience with unit testing, including low-level code
• Comfortable working in an existing codebase and improving it over time
• English: Intermediate+
   

Nice to have (not required)

• Yocto / Embedded Linux, kernel driver development
• Microcontrollers, FreeRTOS / bare-metal
• Performance work: SIMD/NEON (OpenCL/CUDA depending on domain)
• Python/Matlab for prototyping; signal/image processing; basic electronics
• Docker/Podman, CI/CD experience
   

Team & process

• International teams: about 30 engineers (Norway) + 30–40 contractors. 
• Agile/Scrum with typical 3-week sprints
• Tooling: GitLab CI/CD, Jira/Confluence, HP ALM
   

Work setup

• Remote during wartime → office/hybrid later (Kyiv or Kharkiv)
• MacBook