Jobs at Djinni

We are looking for a Senior Python Engineer to join our Secure Infrastructure Access (SIA) team. This team provides secure, brokered Remote Desktop access to Windows servers without exposing credentials or opening inbound network access. In this role you will be using AWS serverless architecture, AWS CDK & Python to design, develop, test, secure & deploy services from planning to production.
The team works in full collaboration with security architects, product managers and other development teams.

What We’re Looking For

• 5+ years of experience in Python development.
• 2+ years of hands-on experience building and deploying serverless applications on AWS.
• Strong problem-solving and analytical skills, with a passion for clean, maintainable code.
• Excellent communication and teamwork abilities, with the confidence to lead and influence.
• Self-driven, proactive, and eager to learn and share knowledge.

Bonus Points For

• Experience with CI/CD tools (e.g., Jenkins, Git, Artifactory).
• Background in SaaS application development.
• Solid understanding of security best practices, including OWASP guidelines and threat modeling.
• Proficiency in AWS CDK for infrastructure as code.

What You’ll Do

• Deliver E2E features and enhancements while keeping the highest quality and security standards
• Practice all software development life cycle in agile oriented environment
• Research and implement sophisticated Cyber security mechanisms
• Explore new technologies and tools to keep us using cutting edge solutions
• Help guide and contribute to feature design and implementation to bring the product to the next level
• Participate in continuous and iterative engineering cycles with emphasis on code quality, supportability, scalability, and performance

Work Schedule

Full-time working day. 

Interview Stages

1. HR interview with our recruiter
2. Technical interview with the Engineering Manager (1 hour)
3. Coding interview (2 hours)
4. Final HR interview with the Tech Lead

We are looking for a Technical Support Manager (L1) to provide high-level assistance to our customers and partners. This role includes diagnosing and troubleshooting software issues, as well as configuring customer and provider accounts, including AI models.

📌 Please note: This position requires working night shifts, including:

One shift from 11:00 PM to 8:00 AM (23:00 – 08:00)
One shifts from 10:00 PM to 7:00 AM (22:00 – 07:00)
 

Primary responsibilities of a Technical Support Manager:
- Diagnose and troubleshoot technical issues, including account setup;
- Ask customers targeted questions to quickly understand the root of the problem;
- Guide clients and providers through issue resolution via phone, email, or chat;
- Properly escalate unresolved issues to appropriate internal teams;
- Provide prompt and accurate feedback to customers;
- Oversee the integration pipeline;
- Configure provider and client accounts;

- Utilize AI models to automate issue diagnostics, analyze client data, and optimize support processes.

Requirements & Skills

- Proven work experience as a Technical Support Engineer, Desktop Support Engineer, IT Help Desk Technician or similar role;

- Ability to diagnose and troubleshoot basic technical issues;

- Experience working with AI models for data analysis, process automation, or customer support;

- Excellent problem-solving and communication skills;

- Excellent skills in SQL;

- Ability to provide step-by-step technical help, both written and verbal;

- BS degree in Information Technology, Computer Science, or relevant field.

Probation

- Standard probation — 3 months (may be exceptional cases)

About Us

We are a fast-growing company in the AI Voice / performance-driven B2B space. We help businesses replace inefficient manual processes with scalable AI solutions that directly impact revenue.
Our product is already used by 20+ brands across 8+ GEOs, and we are scaling our sales engine aggressively.

Who We’re Looking For

We’re looking for ambitious and results-driven SDR experienced in LinkedIn, Telegram, Email and advanced Research Tools, who will own the the funnel: outbound outreach, lead qualification, and booking high-quality meetings.

About You

You are proactive, structured, and comfortable with high-volume outbound. You understand that SDR is not about “sending messages”, but about creating qualified sales opportunities. You’re metrics-driven and iterate fast. You understand the hypothesis approach and prospects’ enrichment. You have experience with setting up email infrastructure (deliverability, inboxes, etc.)

What Awaits You

• Product that sells itself and is demanded by the market
• High-intensity, performance-oriented team
• Clear KPIs and transparent bonus logic
• Opportunity to grow into Senior SDR / AE / Sales Lead
• Direct impact on revenue and strategy

Responsibilities

• Research buying signals and launch trigger-based outreach
• Research and test new channels and approaches
• Crafting, launching and managing campaigns
• Sourcing and qualifying ICP leads by GEO, company size, use case
• Schedule appointments with decision makers.

Requirements

• 1–3+ years in SDR / BDR / outbound sales (B2B).
• Strong written and spoken English.
• Successful experience with LinkedIn, Email and Telegram outreach for B2B sales.
• Hands-on setup experience with emails, telegram, research instruments (e.g. Apollo, Clay).
• Experience with practical use of AI-driven tools for outreach.
• High level of self-organization.

Nice to Have

• Experience in iGaming / Performance marketing.
• Experience with CRM tools (HubSpot, Pipedrive, Salesforce).
• Cold calling experience.

What we offer
Fully remote work format and flexible working hours.

• Competitive salary pegged to USD.
• 24 days of paid vacation (sick leave, national, religious, and company holidays).
• A friendly communication culture and transparent processes.
• Dynamic work environment.
• Opportunities for professional development and career growth.
• No micromanagement — just trust, ownership, and freedom to experiment.

Job Description

• Total of 7+ years of development/design experience with a minimum of 5 years of experience in Big Data technologies on-prem or on cloud.
• Experience with architecting, building, implementing, and managing Big Data platforms On Cloud, covering ingestion (Batch and Real-time), processing (Batch and Real-time), Polyglot Storage, Data Analytics, and Data Access
• Good understanding of Data Governance, Data Security, Data Compliance, Data Quality, Meta Data Management, Master Data Management, Data Catalog
• Proven understanding and demonstrable implementation experience of big data platform technologies on cloud (AWS and Azure), including surrounding services like IAM, SSO, Cluster monitoring, Log Analytics, etc.
• Experience working with Enterprise Data Warehouse technologies, Multi-Dimensional Data Modeling, Data Architectures or other work related to the construction of enterprise data assets
• Strong Experience implementing ETL/ELT processes and building data pipelines including workflow management, job scheduling and monitoring
• Experience building stream-processing systems, using solutions such as Apache Spark, Databricks, Kafka etc.
• Experience with Spark/Databricks technology is a must
• Experience with Big Data querying tools
• Solid skills in Python
• Strong experience with data modelling and schema design
• Strong SQL programming background
• Excellent interpersonal and teamwork skills
• Experience to drive solution/enterprise-level architecture, collaborate with other tech leads
• Strong problem solving, troubleshooting and analysis skills
• Experience working in a geographically distributed team
• Experience with leading and mentorship of other team members
• Good knowledge of Agile Scrum
• Good communication skills

Job Responsibilities

• Work directly with the Client teams to understand the requirements/needs and rapidly prototype data and analytics solutions based upon business requirements
• Design, implement, and manage large-scale data platform/applications, including ingestion, processing, storage, data access, data governance capabilities and related infrastructure
• Support design and development of solutions for the deployment of data analytics notebooks, tools, dashboards and reports to various stakeholders
• Communication with Product/DevOps/Development/QA team
• Architect data pipelines and ETL/ELT processes to connect with various data sources
• Design and maintain enterprise data warehouse models
• Take part in the performance optimization processes
• Guide on research activities (PoC) if necessary
• Manage cloud based data & analytics platform
• Establishing best practices with CI\CD under BigData scope

About Revenue Grid 

Revenue Grid is an AI-first B2B SaaS company building the intelligence layer for enterprise revenue teams. We turn fragmented relationship data into structured, actionable insight — enabling organizations to drive predictable revenue with greater visibility and control. 

We operate in high-compliance industries where governance, auditability, and execution discipline are critical. As we scale this direction, we are investing in category leadership — positioning Revenue Grid at the intersection of AI, relationship intelligence, and enterprise revenue performance. 

About the Role 

We are hiring a Director of Content Marketing to architect and scale a modern, revenue-driven content function. 

This is a strategic leadership role with direct influence on go-to-market narrative, market positioning, and pipeline performance. You will define how Revenue Grid is understood in the market and establish content as a core growth lever. 

This role requires strategic clarity and executional depth – someone who understands modern discovery dynamics (SEO, AEO, LLM-driven search) and can translate insight into scalable, high-impact storytelling. 

Why This Role Is Pivotal 

In modern B2B SaaS, buyers complete most of their evaluation before engaging sales. They independently assess capabilities, compare vendors, and form opinions long before a first call. Content shapes that evaluation – defining positioning, educating the market, and guiding complex buying decisions at scale. 

At Revenue Grid, content directly influences pipeline quality and capital efficiency. It drives qualified inbound demand, strengthens MQL-to-SQL conversion, accelerates sales cycles, improves win rates, and lowers overall CAC. When content reduces friction and sharpens understanding, the entire revenue engine performs better. 

What You’ll Own 

Revenue-Driven Content Strategy & Growth 
Own and execute the end-to-end content strategy aligned to product growth and revenue objectives. Build and scale a full-funnel content engine supporting awareness, demand generation, and sales enablement. 

Buyer Education & Funnel Acceleration 
Design content as the primary driver of buyer self-education in a sales-led environment. Enable prospects to independently understand product value and differentiation, improving conversion, velocity, and win rates. 

Category Positioning & Competitive Differentiation 
Lead competitive intelligence across players such as Gong, Clari, Salesloft, and Outreach. Translate insights into sharp positioning, differentiated messaging, and authoritative thought leadership. 

AI-Native Search & Discovery 
Own modern search strategy (including SEO, Answer Engine Optimization (AEO), and LLM-driven discovery) ensuring content is structured for both human buyers and AI-powered systems. 

Content Architecture & Operating Model 
Own the content roadmap and editorial calendar aligned to GTM priorities. Build scalable production workflows and systems to support multi-format execution across blogs, landing pages, guides, video, gated assets, email, reports, and partner initiatives. 

Performance & Revenue Impact 
Define KPIs and measure impact across pipeline metrics, including inbound quality, MQL-to-SQL conversion, sales velocity, win rates, and CAC. Continuously optimize and report performance to leadership. 

Cross-Functional GTM Integration 
Partner closely with Product, Sales, RevOps, and Leadership to align messaging, launches, and enablement priorities – embedding content into the broader revenue operating system. 

What We’re Looking For 

• 7+ years of experience in B2B SaaS content marketing, including leadership responsibility 
• Proven track record of building and scaling content strategies from scratch with measurable pipeline and revenue impact 
• Deep expertise in SEO, keyword research, on-page optimization, and AI/LLM-driven discovery (AEO) 
• Strong ownership of messaging, positioning, and narrative at product or company level 
• Experience leading or mentoring content teams and managing external contributors 
• Demonstrated ability to tie content performance to pipeline metrics, conversion, and customer acquisition cost 
• Strategic mindset with the ability to operate at both executive and executional levels 
• Experience working cross-functionally with Product, Sales, RevOps, and Leadership 
• Familiarity with tools such as HubSpot, Google Analytics, WordPress, ChatGPT, ContentSquare (or similar) 

Strongly Preferred 

• Background in sales tech, RevOps, AI-driven SaaS, or high-compliance industries 
• Experience operating in competitive, category-defining markets 
• Experience building content engines for US enterprise audiences 

What We Offer 

• Remote-first culture (with required 9am–1pm EST overlap) 
• High ownership and executive visibility 
• Opportunity to define category narrative from the ground up 
• Transparent, fast hiring process with actionable feedback 
• Unlimited vacation – we value outcomes, not hours 

 
Join Us 

We’re not looking for “just a writer.” 
We’re looking for a strategic storyteller and content leader who can build a content machine that drives awareness, trust, and growth. 

If you’re excited about owning content at this level – whether as a Manager or Director – we’d love to hear your story. 

🚀 About the Role

We are looking for a B2B Marketing Manager to own and scale inbound lead generation through trusted B2B review and listing platforms such as Clutch, G2, GoodFirms, DesignRush, and UpCity.

This is a marketing ownership role, sitting at the intersection of:

• inbound marketing
• brand positioning
• SEO mindset
• demand generation

Your goal is not just visibility — but qualified inbound leads from the US and Europe.

🎯 What You’ll Be Responsible For

You will own this channel end-to-end, from strategy to measurable impact:

• Own and manage company presence on:
  • Clutch
  • G2
  • GoodFirms
  • DesignRush
  • UpCity
• Build and execute a growth strategy for review platforms:
  • visibility
  • rankings
  • positioning
  • conversion into inbound leads
• Optimize profiles using:
  • keywords and categories
  • service positioning
  • case studies and messaging
• Design and manage a systematic review collection process:
  • client reviews
  • Clutch interviews
  • testimonials
• Collaborate closely with:
  • Sales (lead quality & feedback)
  • Account / Delivery teams (reviews & case studies)
  • Marketing (brand voice & positioning)
• Analyze competitors’ profiles and identify ranking opportunities
• Track and analyze performance:
  • profile views
  • clicks
  • inbound leads
  • lead quality and conversion
• Prepare clear, actionable reports focused on business impact
• Test and manage paid placements or sponsorships on platforms when ROI is justified

✅ Required Experience (Must-Have)

This role is a strong fit for you if you have:

• 2+ years of experience in B2B marketing, preferably in:
  • IT outsourcing
  • software development services
  • tech consulting
• Hands-on experience working with B2B review or listing platforms
• Experience generating inbound leads through marketing channels
• Understanding of how:
  • platform visibility
  • rankings
  • positioning
    impact lead flow
• Experience working with:
  • client reviews
  • testimonials
  • case studies
• English level Upper-Intermediate or higher
• Ownership mindset — you can independently build, test, improve, and scale a channel

⭐ Nice-to-Have (Strong Advantage)

• SEO mindset and keyword research skills
• Experience with paid options on Clutch or G2
• Experience with CRM systems and lead attribution
• Background in inbound or demand generation marketing

❌ This Role Is NOT For You If

• Your background is mainly SDR, cold outreach, or outbound sales
• You are looking for a commission-based sales role
• You prefer task-based execution over owning a channel end-to-end
• You have no interest in inbound or brand-driven growth

💎 What We Offer

• Fully remote work with flexible hours
• Competitive and transparent compensation
• Direct impact on inbound pipeline and brand trust
• A mature, people-first company with long-term focus
• Freedom to own and scale a high-impact marketing channel

📩 How to Apply

When applying, please mention:

• your experience with B2B review platforms
• examples of inbound or marketing results you achieved

🎯 Who This Role Is Perfect For

• Digital Marketing Managers in IT outsourcing
• B2B Growth Marketers focused on inbound
• Marketers who want ownership over a meaningful, revenue-impacting channel — not just campaign execution

We are looking for a junior backend VLSI engineer to join our Physical Design team.

This role is ideal for new graduates with strong academic foundations in digital design and VLSI who want to learn and execute a full RTL→GDSII implementation flow using Synopsys tools.

You will gain hands-on experience working on advanced semiconductor technologies, including nodes down to 7 nm, 5 nm, 3 nm, and 2 nm.

Responsibilities:

Assist in synthesis (Design Compiler / Fusion Compiler) from RTL to gate-level netlist

Support floorplanning, power planning, and clock tree design

Perform place and route (P&R) using ICC2 / Fusion Compiler

Contribute to timing analysis and closure using PrimeTime (STA)

Run physical verification checks: DRC, LVS, antenna, IR-drop, EM

Prepare and validate design constraints (SDC, clock definitions, I/O timing)

Help generate and validate physical deliverables (LEF/DEF, SPEF, SDF)

Collaborate with RTL, DFT, package, verification, and integration teams

Document design steps, results, and signoff data

Required Qualifications:

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or related field

Strong understanding of digital logic, synchronous design, and timing fundamentals

Academic exposure to VLSI backend flows

Basic familiarity with: synthesis, place & route, STA

Scripting skills (TCL, Python, Shell)

Strong analytical and problem-solving mindset

Motivation to learn deep-submicron implementation techniques (FinFET and GAA nodes)

Nice-to-Have Skills

Exposure to Synopsys tools (DC, ICC2, PT) through coursework or projects

Understanding of setup/hold timing, OCV, derates, clock uncertainty

Basic knowledge of physical effects: congestion, crosstalk, IR-drop, EM

Linux environment experience

Familiarity with Git or similar tools

What We Offer:

Hands-on work on advanced semiconductor nodes down to 2 nm

Full training in modern RTL→GDSII physical design flows

Mentorship from senior PD and STA engineers

Opportunity to work on high-performance ASICs and SoC designs

Clear growth path toward P&R specialist, STA engineer, PD lead, or chip integration engineer

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail
• High motivation to learn package design and SI/PI methodologies
• Nice-to-Have Skills
• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Verification Engineer to join our VLSI design and verification team.

This is an excellent opportunity for new graduates with strong academic training in digital design, verification methodologies, and SystemVerilog/UVM.

Responsibilities:

Develop and execute verification testbenches using Verilog/SystemVerilog and UVM

Implement functional and constrained-random tests for block-level and SoC-level designs

Create coverage models (functional, code, assertion-based) and drive coverage closure

Debug simulation failures, interface mismatches, and RTL issues

Write and maintain scoreboards, monitors, agents, drivers, and checkers in UVM

Review design specifications, extract test requirements, and build verification plans

Run regressions, triage failures, and document results

Collaborate closely with RTL designers, DFT, backend, and system architects

Required Qualifications:

B.Sc. or M.Sc. in Electrical/Computer Engineering or related field

Strong academic background in digital logic, computer architecture, and VLSI design

Hands-on experience with Verilog and SystemVerilog (labs, projects, internship)

Basic understanding of UVM methodology

Familiarity with simulation tools (VCS, QuestaSim, Xcelium or similar)

Ability to read and understand RTL code

Good analytical and debugging skills

Strong motivation to grow in advanced functional verification

Nice-to-Have Skills:

Coursework or project experience with UVM testbench development

Familiarity with assertion-based verification (SVA)

Basic scripting (Python, Perl, Shell, TCL)

Experience with coverage-driven verification

Exposure to SoC-level interfaces (AXI, PCIe, DDR, Ethernet, SPI, I2C)

What We Offer:

Full training in modern verification methodologies (UVM, SVA, CRV)

Work with cutting-edge IPs and SoC architectures

Mentorship from senior verification and architecture teams

Clear growth path toward UVM specialist, verification lead, or architect

We are looking for highly motivated junior engineers to join our Design-for-Test (DFT) team.

This is an excellent opportunity for graduates who want to build expertise in Scan, Memory BIST, and JTAG within advanced VLSI development.

Responsibilities:

Learn and support implementation of scan insertion and scan chain architecture

Assist in ATPG pattern generation and test coverage analysis

Participate in Memory BIST (MBIST) integration and verification

Work with JTAG / IEEE 1149.1 boundary scan concepts and flows

Help debug test-related issues at RTL and gate level

Collaborate with senior DFT engineers on SoC-level test strategy

Required Background:

Academic knowledge in digital logic, VLSI design, and computer architecture

Basic familiarity with DFT concepts: scan, ATPG, BIST, boundary scan

Understanding of Verilog or VHDL

Scripting basics (Python, TCL, Shell)

Good analytical and problem-solving skills

Strong motivation to learn industry-standard DFT tools and flows

What We Offer:

Full training in Scan, MBIST, JTAG, ATPG, and DFT methodologies

Mentorship by experienced DFT engineers

Exposure to advanced SoC development flows and signoff

Growth path toward senior DFT, test architecture, or silicon bring-up roles

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 14, 10, 8, 7 nanometers.

You will be responsible for digital logic design and verification. Besides, you'd be able to learn and improve related methodologies. Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are analytical thinking and ability to learn.

Essential qualifications:

-Degree in Electronics or related fields

-Good understanding of digital electronics

-Experience with EDA tools (Xilinx, Mentor Graphics, Synopsys or similar)

-Beginner’s level of English or higher

Optional qualifications you may have:

-FPGA design using HDL (Verilog, VHDL) or schematics editor

-IC design verification using System Verilog

-CPU architecture knowledge, embedded SW development

We offer:

-Full-time employment, flexible schedule

-On-job training in our Kyiv office with high skilled professionals

-Potential growth in directions of ASIC/FPGA design

-Social benefits, modern and comfortable office facilities

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation