FPGA Developer (Warsaw) Offline

We are looking for a talented and ambitious FPGA Developer to help us with design exploration, architecting and rapid prototyping. You will be closely collaborating with our software and hardware teams. This is a fantastic opportunity to learn about and contribute to the exciting field of efficient deep learning.

 

Responsibilities:

* Architecture, design, verification and validation of RTL components.

* Board bring-up and debugging.

* Cross-team collaboration.

* We provide a challenging and creative environment where contributions are highly visible. We encourage you to take initiatives.

* We provide a lot of autonomy and expect our engineers to own the design from A to Z.

* We expect our engineers to be energetic and driven to succeed because this is an opportunity to learn a lot and take on many responsibilities. Career advancement opportunities are to be expected as the company grows.

 

Requirements:

* At least 5 years of experience in a similar role.

* Deep knowledge and experience with modern FPGA architectures, CAD tools (Vivado or Quartus) and techniques.

* Knowledge of computer architecture. Understanding of bandwidth and latency optimisation techniques.

* RTL and testbench development with Verilog or System Verilog.

* Familiarity with SoC architectures.

* Knowledge of computer arithmetics.

* Experience in hardware acceleration of mathematical algorithms.

* System-level data exchange protocols and interconnects: AXI, AHB or others.

* Good knowledge of hardware verification methodologies.

* Git or similar VCS.

* Scripting and flow automation (bash, Tcl or others).

* Excellent spoken and written English.

 

Nice To Have:

* Linux and device driver development experience.

* Advanced verification techniques (assertions, etc.) are desirable.

* Knowledge of and/or experience with ASIC design is a plus.

* Knowledge of deep learning frameworks (TensorFlow) will be a big plus.

 

Benefits

* Stock options.

* Competitive salary.

* Relocation assistance.

* Choose your own laptop.

* 25 days of paid vacation time in addition to bank holidays.

* Paid travel to top research and developer conferences.

* Flexible working hours.

* Pension contribution.

Required skills experience

FPGA, Vivado, ASIC, Verilog
Published
0 views
ยท
0 applications

The job ad is no longer active

Look at the current jobs Data Science Relocate→

Loading...