Jobs at Djinni

We are looking for a junior backend VLSI engineer to join our Physical Design team.

This role is ideal for new graduates with strong academic foundations in digital design and VLSI who want to learn and execute a full RTL→GDSII implementation flow using Synopsys tools.

You will gain hands-on experience working on advanced semiconductor technologies, including nodes down to 7 nm, 5 nm, 3 nm, and 2 nm.

Responsibilities:

Assist in synthesis (Design Compiler / Fusion Compiler) from RTL to gate-level netlist

Support floorplanning, power planning, and clock tree design

Perform place and route (P&R) using ICC2 / Fusion Compiler

Contribute to timing analysis and closure using PrimeTime (STA)

Run physical verification checks: DRC, LVS, antenna, IR-drop, EM

Prepare and validate design constraints (SDC, clock definitions, I/O timing)

Help generate and validate physical deliverables (LEF/DEF, SPEF, SDF)

Collaborate with RTL, DFT, package, verification, and integration teams

Document design steps, results, and signoff data

Required Qualifications:

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or related field

Strong understanding of digital logic, synchronous design, and timing fundamentals

Academic exposure to VLSI backend flows

Basic familiarity with: synthesis, place & route, STA

Scripting skills (TCL, Python, Shell)

Strong analytical and problem-solving mindset

Motivation to learn deep-submicron implementation techniques (FinFET and GAA nodes)

Nice-to-Have Skills

Exposure to Synopsys tools (DC, ICC2, PT) through coursework or projects

Understanding of setup/hold timing, OCV, derates, clock uncertainty

Basic knowledge of physical effects: congestion, crosstalk, IR-drop, EM

Linux environment experience

Familiarity with Git or similar tools

What We Offer:

Hands-on work on advanced semiconductor nodes down to 2 nm

Full training in modern RTL→GDSII physical design flows

Mentorship from senior PD and STA engineers

Opportunity to work on high-performance ASICs and SoC designs

Clear growth path toward P&R specialist, STA engineer, PD lead, or chip integration engineer

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail
• High motivation to learn package design and SI/PI methodologies
• Nice-to-Have Skills
• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Verification Engineer to join our VLSI design and verification team.

This is an excellent opportunity for new graduates with strong academic training in digital design, verification methodologies, and SystemVerilog/UVM.

Responsibilities:

Develop and execute verification testbenches using Verilog/SystemVerilog and UVM

Implement functional and constrained-random tests for block-level and SoC-level designs

Create coverage models (functional, code, assertion-based) and drive coverage closure

Debug simulation failures, interface mismatches, and RTL issues

Write and maintain scoreboards, monitors, agents, drivers, and checkers in UVM

Review design specifications, extract test requirements, and build verification plans

Run regressions, triage failures, and document results

Collaborate closely with RTL designers, DFT, backend, and system architects

Required Qualifications:

B.Sc. or M.Sc. in Electrical/Computer Engineering or related field

Strong academic background in digital logic, computer architecture, and VLSI design

Hands-on experience with Verilog and SystemVerilog (labs, projects, internship)

Basic understanding of UVM methodology

Familiarity with simulation tools (VCS, QuestaSim, Xcelium or similar)

Ability to read and understand RTL code

Good analytical and debugging skills

Strong motivation to grow in advanced functional verification

Nice-to-Have Skills:

Coursework or project experience with UVM testbench development

Familiarity with assertion-based verification (SVA)

Basic scripting (Python, Perl, Shell, TCL)

Experience with coverage-driven verification

Exposure to SoC-level interfaces (AXI, PCIe, DDR, Ethernet, SPI, I2C)

What We Offer:

Full training in modern verification methodologies (UVM, SVA, CRV)

Work with cutting-edge IPs and SoC architectures

Mentorship from senior verification and architecture teams

Clear growth path toward UVM specialist, verification lead, or architect

We are looking for highly motivated junior engineers to join our Design-for-Test (DFT) team.

This is an excellent opportunity for graduates who want to build expertise in Scan, Memory BIST, and JTAG within advanced VLSI development.

Responsibilities:

Learn and support implementation of scan insertion and scan chain architecture

Assist in ATPG pattern generation and test coverage analysis

Participate in Memory BIST (MBIST) integration and verification

Work with JTAG / IEEE 1149.1 boundary scan concepts and flows

Help debug test-related issues at RTL and gate level

Collaborate with senior DFT engineers on SoC-level test strategy

Required Background:

Academic knowledge in digital logic, VLSI design, and computer architecture

Basic familiarity with DFT concepts: scan, ATPG, BIST, boundary scan

Understanding of Verilog or VHDL

Scripting basics (Python, TCL, Shell)

Good analytical and problem-solving skills

Strong motivation to learn industry-standard DFT tools and flows

What We Offer:

Full training in Scan, MBIST, JTAG, ATPG, and DFT methodologies

Mentorship by experienced DFT engineers

Exposure to advanced SoC development flows and signoff

Growth path toward senior DFT, test architecture, or silicon bring-up roles

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 14, 10, 8, 7 nanometers.

You will be responsible for digital logic design and verification. Besides, you'd be able to learn and improve related methodologies. Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are analytical thinking and ability to learn.

Essential qualifications:

-Degree in Electronics or related fields

-Good understanding of digital electronics

-Experience with EDA tools (Xilinx, Mentor Graphics, Synopsys or similar)

-Beginner’s level of English or higher

Optional qualifications you may have:

-FPGA design using HDL (Verilog, VHDL) or schematics editor

-IC design verification using System Verilog

-CPU architecture knowledge, embedded SW development

We offer:

-Full-time employment, flexible schedule

-On-job training in our Kyiv office with high skilled professionals

-Potential growth in directions of ASIC/FPGA design

-Social benefits, modern and comfortable office facilities

N-iX is a global software development company founded in 2002, connecting over 2,400+ tech professionals across 40+ countries. We deliver innovative technology solutions in cloud computing, data analytics, AI, embedded software,IoT, and more to global industry leaders and Fortune 500 companies. Join us to create technology that drives real change for businesses and people across the world.

Senior Observability Engineer will drive the observability platform to new heights, with a strong focus on ClickHouse as a telemetry storage solution. You will lead the migration from a custom Cosmos telemetry system to ClickHouse, ensuring robust alerting, notifications, and telemetry capabilities. This individual contributor role is hybrid and reports to the Sr. Manager.

Our client is committed to building trust and making the world more agreeable for our employees, customers, and communities. Here, you have the opportunity to be heard, exchange ideas openly, contribute meaningfully, and be proud of your work as part of a team making a global impact.

About the Team

Our Cloud Engineering team runs on collaboration, curiosity, and innovation. We build mission-critical cloud solutions that support millions of people and businesses globally. We value agile principles, DevOps practices, and infrastructure as code—in everything we do, we aim for reliability, scalability, and security.

Responsibilities

• Lead the migration and transformation of telemetry storage from custom Cosmos DB solutions to ClickHouse, building a scalable and reliable end-to-end observability platform.
• Architect, implement, and maintain alerting and notification systems integrated with ClickHouse for critical services and applications.
• Develop, deploy, and operate high-throughput telemetry pipelines, ensuring accurate and actionable monitoring across cloud environments.
• Collaborate with engineering and product teams to define and champion observability best practices.
• Design and build dashboards and visualization tools to enable proactive monitoring, detection, and resolution of incidents.
• Work with DevOps and development teams to automate collection, ingestion, and retention policies for logs, metrics, and traces.
• Drive continuous improvement in system performance, stability, and reliability through effective observability.
• Participate in on-call rotations, incident response, and root cause analysis to enhance monitoring and alerting capabilities.

Requirements

• 5+ years’ engineering experience in cloud observability platforms, infrastructure, and telemetry systems.
• Deep experience in alerting, notifications, and monitoring at scale.
• Advanced expertise with ClickHouse, or similar high-performance analytical databases, for telemetry storage and querying.
• Hands-on experience migrating telemetry/storage solutions (preferably from Cosmos DB to ClickHouse or equivalent).
• Solid understanding of telemetry pipelines, cloud-native monitoring, and best practices.
• Experience with dashboarding and visualization tools (Grafana, Kibana, or similar).
• Strong scripting and automation skills (Python, Bash, Terraform or equivalent).
• Proven collaboration and communication skills across cross-functional teams.

We offer*:

• Flexible working format - remote, office-based or flexible
• A competitive salary and good compensation package
• Personalized career growth
• Professional development tools (mentorship program, tech talks and trainings, centers of excellence, and more)
• Active tech communities with regular knowledge sharing
• Education reimbursement
• Memorable anniversary presents
• Corporate events and team buildings
• Other location-specific benefits

*not applicable for freelancers

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

N-iX is a global software development company founded in 2002, connecting over 2,400+ tech professionals across 40+ countries. We deliver innovative technology solutions in cloud computing, data analytics, AI, embedded software,IoT, and more to global industry leaders and Fortune 500 companies. Join us to create technology that drives real change for businesses and people across the world.

Our client is a global UK-based financial services and investment banking organization developing an AI-powered document processing and automation platform used across multiple businesses within the wider banking group. The platform leverages modern cloud and AI technologies to transform legacy workflows, enhance data quality, and accelerate digital decision-making.

Position Overview:
 

We are looking for a Tech Lead Full Stack Engineer with strong hands-on engineering expertise leading agile software development teams. The ideal candidate will define and drive the technical strategy of the platform, guide engineers in delivering scalable and secure systems, and actively contribute to architectural decisions and solution design.

This role requires both strong technical depth and leadership capabilities, particularly in environments involving Google Cloud, microservices, APIs, Python and data-intensive processing.

The Tech Lead will work closely with product, architecture, data science, and engineering teams to ensure high-quality delivery and alignment with business outcomes.

Join Our Team & Earn Exciting Bonuses!
As a special incentive, we’re offering a Welcome Bonus of $3,000 USD for a new hire. Plus, if you refer a friend who gets hired, you’ll receive a Referral Bonus of $2000 USD!

Key Responsibilities:

• Define and communicate the technical vision, architecture, and engineering roadmap for the team and platform.
• Lead engineers, conduct code reviews, provide architectural guidance, and ensure adherence to engineering standards.
• Lead the technical delivery lifecycle from design and development to deployment and maintenance.
• Build scalable, high-performance microservices and UI and APIs using modern frameworks and cloud-native design principles.
• Oversee integration of AI components (E.g Google Cloud, Vertex AI, Gemini models, and LLM evaluation frameworks)
• Promote test-driven development, automate testing pipelines, and ensure robust, maintainable code.
• Work with product managers, architects, BAs, and business teams to translate business needs into technical solutions.
• Contribute to product strategy, identify technical opportunities, and propose improvements to shape future releases.
• Drive best practices for cloud infrastructure, security, observability, and performance optimization on Google Cloud.
   

Requirements:

• 8+ years of experience in software engineering with at least 3+ years in a Tech/Team Lead role.
• Strong background in software/platform/database design in data-heavy or distributed environments.
• Hands-on experience with microservices, React JS, and cloud-native architectures.
• Proficiency in Python.
• Solid Cloud experience (GCP is prefferable) 
• Hands-on experience building and integrating LLM pipelines, handling conversation memory, and long-running workflows
• Proficiency in RAG architectures with a focus on optimized search retrieval and scalable data indexing strategies
• Practical experience with AI output validation, automated evaluation strategies, and secure AI integration
• Experience with LLM observability, tracing (e.g., LangSmith, Langfuse), and token usage/cost optimization
• Experience implementing automated testing frameworks, CI/CD pipelines, and TDD/BDD practices.
• Strong understanding of software engineering principles: scalability, performance, reliability, observability.
• Proven experience leading engineering teams in agile delivery environments.
• Advanced English and excellent communication skills and ability to work with both technical and non-technical stakeholders.
   

Nice to Have:

• Prior exposure to document processing platforms, OCR, NLP, or workflow automation.
• Experience in financial services or other regulated industries.
• Familiarity with architectural frameworks (C4 modeling, DDD, event-driven systems).

We offer*:

• Flexible working format - remote, office-based or flexible
• A competitive salary and good compensation package
• Personalized career growth
• Professional development tools (mentorship program, tech talks and trainings, centers of excellence, and more)
• Active tech communities with regular knowledge sharing
• Education reimbursement
• Memorable anniversary presents
• Corporate events and team buildings
• Other location-specific benefits

*not applicable for freelancers

N-iX is a global software development company founded in 2002, connecting over 2,400+ tech professionals across 40+ countries. We deliver innovative technology solutions in cloud computing, data analytics, AI, embedded software,IoT, and more to global industry leaders and Fortune 500 companies. Join us to create technology that drives real change for businesses and people across the world.

Our client is a global UK-based financial services and investment banking organization developing an AI-powered document processing and automation platform used across multiple businesses within the wider banking group. The platform leverages modern cloud and AI technologies to transform legacy workflows, enhance data quality, and accelerate digital decision-making.

Position Overview:
 

We are looking for a Tech Lead Full Stack Engineer with strong hands-on engineering expertise leading agile software development teams. The ideal candidate will define and drive the technical strategy of the platform, guide engineers in delivering scalable and secure systems, and actively contribute to architectural decisions and solution design.

This role requires both strong technical depth and leadership capabilities, particularly in environments involving Google Cloud, microservices, APIs, Python and data-intensive processing.

The Tech Lead will work closely with product, architecture, data science, and engineering teams to ensure high-quality delivery and alignment with business outcomes.

Join Our Team & Earn Exciting Bonuses!
As a special incentive, we’re offering a Welcome Bonus of $3,000 USD for a new hire. Plus, if you refer a friend who gets hired, you’ll receive a Referral Bonus of $2000 USD!

Key Responsibilities:

• Define and communicate the technical vision, architecture, and engineering roadmap for the team and platform.
• Lead engineers, conduct code reviews, provide architectural guidance, and ensure adherence to engineering standards.
• Lead the technical delivery lifecycle from design and development to deployment and maintenance.
• Build scalable, high-performance microservices and UI and APIs using modern frameworks and cloud-native design principles.
• Oversee integration of AI components (E.g Google Cloud, Vertex AI, Gemini models, and LLM evaluation frameworks)
• Promote test-driven development, automate testing pipelines, and ensure robust, maintainable code.
• Work with product managers, architects, BAs, and business teams to translate business needs into technical solutions.
• Contribute to product strategy, identify technical opportunities, and propose improvements to shape future releases.
• Drive best practices for cloud infrastructure, security, observability, and performance optimization on Google Cloud.
   

Requirements:

• 8+ years of experience in software engineering with at least 3+ years in a Tech/Team Lead role.
• Strong background in software/platform/database design in data-heavy or distributed environments.
• Hands-on experience with microservices, React JS, and cloud-native architectures.
• Proficiency in Python.
• Solid Cloud experience (GCP is prefferable) 
• Hands-on experience building and integrating LLM pipelines, handling conversation memory, and long-running workflows
• Proficiency in RAG architectures with a focus on optimized search retrieval and scalable data indexing strategies
• Practical experience with AI output validation, automated evaluation strategies, and secure AI integration
• Experience with LLM observability, tracing (e.g., LangSmith, Langfuse), and token usage/cost optimization
• Experience implementing automated testing frameworks, CI/CD pipelines, and TDD/BDD practices.
• Strong understanding of software engineering principles: scalability, performance, reliability, observability.
• Proven experience leading engineering teams in agile delivery environments.
• Advanced English and excellent communication skills and ability to work with both technical and non-technical stakeholders.
   

Nice to Have:

• Prior exposure to document processing platforms, OCR, NLP, or workflow automation.
• Experience in financial services or other regulated industries.
• Familiarity with architectural frameworks (C4 modeling, DDD, event-driven systems).

We offer*:

• Flexible working format - remote, office-based or flexible
• A competitive salary and good compensation package
• Personalized career growth
• Professional development tools (mentorship program, tech talks and trainings, centers of excellence, and more)
• Active tech communities with regular knowledge sharing
• Education reimbursement
• Memorable anniversary presents
• Corporate events and team buildings
• Other location-specific benefits

*not applicable for freelancers

We are looking for a Recruiter with 1+ years of commercial experience in IT domain who is excited and driven by the challenge of connecting people with their future careers.

You’ll be helping us find the best candidates for our primary service company, TechMagic, as well as for global product companies through our recruitment agency, MagicHire, a subsidiary of TechMagic.

You should be a confident communicator—both written and verbal—who enjoys building lasting relationships and connecting with new people.

Must have

• 1+ years of experience in the role of IT Recruiter;
• Being tech-savvy: basic understanding of programming languages (from a recruitment perspective), knowledge of different IT roles;
• Skills in a variety of sourcing techniques (not only job websites);
• Willingness to work with different levels of positions, both tech and non-tech;
• Superb written & verbal communication skills;
• English — at least intermediate strong level (we hire globally).

Responsibilities

• Active search and headhunting;
• Sourcing through professional networks, databases, referrals, job sites etc.;
• Daily communication with potential candidates;
• Conducting pre-screens, interviews and providing information about the company;
• Communication with Hiring managers;
• Collecting and providing feedback;
• Preparing and making job offers;
• Help us build an impressive Employer Brand.

Interview Stages

1. Test task

2. Screen with Recruiter
3. Interview with Recruiter and Recruiting Team Lead
4. Final interview with Head of Recruiting and Employer Branding

We offer

• Hiring people for Techmagic (an outsourcing company) and directly for product companies is a unique possibility.
• You’ll work with an experienced team (1 Recruiting Team Lead, 3 Recruiters and 2 Recruitment researchers) who are always ready to help and for knowledge sharing.Great environment for self-development: trainings, online courses, events, compensation budget per employee, English classes, speaking club.
  Paid vacations and sick leaves, additional days-off
• Wellness: Medical insurance/sports compensation/ health check-up
• Fun: budget for team lunches, branded gifts
• One of the best IT employers in Lviv based on DOU rating

Our client is building next-generation AI-powered SAR sensing systems for
exploration, reconnaissance, and ground-penetrating applications.
=>We work with government and defense customers, developing production-grade
airborne SAR systems that push the limits of what radar sensing can detect — even
through soil and complex materials.
=>You will join a small, elite technical team, working directly with the founders,
where your decisions have immediate real-world impact.

Role Overview
=> We are looking for a SAR System Engineer with end-to-end experience building
airborne SAR systems (UAV, aircraft, or satellite).
=> This role is not theoretical. You will design, build, integrate, test, and optimize real
=> SAR payloads and processing pipelines, from raw radar returns to high-quality SAR
imagery ready for AI-based analysis.

Key Responsibilities:

=> Design, assemble, and test airborne SAR systems, primarily UAV-based ground-
penetrating SAR (GP-SAR)

=> Own the full SAR processing pipeline — from raw radar (Level 0) data to final
SAR images:

• Develop and optimize SAR imaging algorithms:
• Back-projection
• Range-Doppler
• Omega-K
• Implement SAR-specific corrections:
• Motion compensation
• Time-zero alignment
 

Required Qualifications:
•Strong, hands-on experience with Synthetic Aperture Radar (SAR)
• Experience delivering complete, deployable SAR systems on airborne platforms (UAV / aircraft / satellite)

Deep understanding of:
=>SAR image formation
=>Radar systems & RF fundamentals
=> Signal processing
=>Solid software engineering skills in Python and/or C++
=>GPU / CUDA experience is a strong plus
=>System-level mindset: ability to bridge research algorithms and production systems.
 

Nice to Have
• Experience with ground-penetrating or material-penetrating SAR
• Background in defense or government SAR programs
• Valid German or EU driving license

Why Join:

• Work directly with founders on cutting-edge SAR, RF, and AI technology
• Strong funding, real customers, real deployments
• Unique location: former Berlin airport with large outdoor test areas
• Competitive salary + VSOP / equity options
• Be a core engineer shaping both the technology and the company

Project: Long-term dedicated development and maintenance of a Business Risk Assessment (BRA) platform for a RegTech company (Sweden/Netherlands).

Product: AML compliance platform that helps organizations perform legally required risk assessments. Replaces Excel/PowerPoint workflows with a unified digital solution. Currently on staging, preparing to go live.

Current stack:
- Frontend: React
- Backend: Python
- Database: PostgreSQL / Supabase
- Infrastructure: Azure
- Prototyping: Lovable (AI-generated prototypes that dev implements into production)

Responsibilities:
- Take ownership of the existing codebase (development + maintenance)
- Stabilize the platform and prepare for production launch
- Build new features based on Lovable prototypes
- Implement document generation and export functionality
- Build API integrations for enterprise clients
- Future: contribute to AI/ML layer (predictive risk scoring)

Requirements:
- 4+ years with React and Python
- Strong PostgreSQL experience
- Azure infrastructure experience (deployment, CI/CD, monitoring)
- Ability to work independently and own the full development cycle
- Experience working with AI code generation tools (Lovable, Cursor, etc.) is a plus
- Fintech / RegTech / compliance domain experience is a strong plus (KYC, AML, risk management)

Engagement: Part-time dedicated, long-term, monthly retainer
Hours: 20 hrs/week 

Start: ASAP
Location: Remote