Jobs at Djinni

Great news! Lynksen is looking for a Creative UI/UX Web Designer to join us on our journey of creating cool Awwwards projects. In this role, you’ll help create designs that feel simple, intuitive, and engaging, balancing beauty with functionality :)

️Functions and Responsibilities:

✦ Participating in customer Discovery processes and analysis to gain insights into user needs and preferences

✦ Creating User Flows, Personas, and Information Architecture to inform the design process

✦ Developing Wireframes and UI kits to shape the visual aspects of products

✦ Translating designs into Figma prototypes with interactive elements, clever animations, and UI transitions

✦ Engaging in design consultations and providing advisory services to both internal teams and external clients

✦ Maintaining effective communication with clients to understand their requirements and deliver exceptional solutions

Requirements:
 

✦ 3+ years of commercial experience with creative projects

✦ A solid knowledge of UI design principles and techniques

✦ A well-developed sense of empathy and the ability to identify and understand the target audience the design is created for

✦ Experience in working with design tools (Figma, Photoshop, Illustrator — required) and animation tools (After Effects/Jitter)

✦ Skilled in color, composition, and font hierarchy for impactful visuals

✦ Basic grasp of software development and technology

✦ Collaborative team player open to sharing and adapting ideas

✦ Upper-intermediate (B2+) level English proficiency in written and spoken communication skills

✦ Strong organizational and time management abilities to thrive in a fast-paced environment and meet deadlines

✦ The positive mind of thinking and the desire to provide feedback

✦ Portfolio showcasing diverse design projects (attached to CV)

What we offer:

✦ 8-hour working day

✦ 21 days of paid vacation

✦ 12 days of paid sick leave

✦ Unlimited days off 

✦ Compensation for professional and English courses

✦ Fun corporate events

Recruitment stages:

✦ Portfolio and CV review

✦ HR interview (30 min)

✦ Test task (no strict deadline)

✦ Final technical interview (1 hour)

Awery invites Support Manager to join the team. We are an international company that has been successfully launching IT solutions for the aviation industry around the world for more than 15 years. Join a rapidly growing and developing team!

www.awery.aero 

Knowledge and skills

• Ability to plan and prioritize tasks;
• Ability to multitask and quickly change priorities;
• The ability to understand the specifics of the program without using technical documentation;
• Ability to work with the issue tracking system (Jira);
• Ability to select and describe programming methods for describing tickets for developers;
• Understand the principles and features of communication with developers and customers;
• Understanding the principles of client-server interaction;

• Knowledge of English at an Upper- intermediate level and above.       

  Functional responsibilities

• Providing support to customers of the system on working days, from Monday to Friday.
• Reception and processing of requirements and project requests from the client or CEO in the Awery support system, client chats, individual chats with individual managers representing the interests of the client;
• Response to the client about the timing of the application ;
• Distribution of applications for further processing of PM;
• Writing tickets indicating the method for the developer\tester\designer;
• Keep customers up to date with the request.
• The development of our colleagues is the success of the company, so we have created the most comfortable conditions:

1. Removed.
2. Work schedule Mon-Fri 10:00—18:30 (flexible schedule possible).-Working hours of the support department from 8.00 to 21.00. Shift schedule by agreement.
3. Official employment/FOP.
4. Paid vacation and sick days.
5.  

About AweryAwery is an international company building IT solutions for the aviation industry. We have been servicing clients all over the world for more than 15 years.

We help to manage aviation businesses with our ERP software platform. Our clients are Commercial Airlines, Cargo Airlines, Private Operators, Aviation Service Providers, Air Charter Brokers, Freight Forwarders & Cargo GSA, On Board Couriers, Cargo Handling Companies (https://awery.aero/customers) Awery aims at increasing productivity, reliability, and efficiency, reducing human intervention/errors, saving time and efforts, and boosting profitability.

Company website: https://awery.aero

We are looking for a junior backend VLSI engineer to join our Physical Design team.

This role is ideal for new graduates with strong academic foundations in digital design and VLSI who want to learn and execute a full RTL→GDSII implementation flow using Synopsys tools.

You will gain hands-on experience working on advanced semiconductor technologies, including nodes down to 7 nm, 5 nm, 3 nm, and 2 nm.

Responsibilities:

Assist in synthesis (Design Compiler / Fusion Compiler) from RTL to gate-level netlist

Support floorplanning, power planning, and clock tree design

Perform place and route (P&R) using ICC2 / Fusion Compiler

Contribute to timing analysis and closure using PrimeTime (STA)

Run physical verification checks: DRC, LVS, antenna, IR-drop, EM

Prepare and validate design constraints (SDC, clock definitions, I/O timing)

Help generate and validate physical deliverables (LEF/DEF, SPEF, SDF)

Collaborate with RTL, DFT, package, verification, and integration teams

Document design steps, results, and signoff data

Required Qualifications:

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or related field

Strong understanding of digital logic, synchronous design, and timing fundamentals

Academic exposure to VLSI backend flows

Basic familiarity with: synthesis, place & route, STA

Scripting skills (TCL, Python, Shell)

Strong analytical and problem-solving mindset

Motivation to learn deep-submicron implementation techniques (FinFET and GAA nodes)

Nice-to-Have Skills

Exposure to Synopsys tools (DC, ICC2, PT) through coursework or projects

Understanding of setup/hold timing, OCV, derates, clock uncertainty

Basic knowledge of physical effects: congestion, crosstalk, IR-drop, EM

Linux environment experience

Familiarity with Git or similar tools

What We Offer:

Hands-on work on advanced semiconductor nodes down to 2 nm

Full training in modern RTL→GDSII physical design flows

Mentorship from senior PD and STA engineers

Opportunity to work on high-performance ASICs and SoC designs

Clear growth path toward P&R specialist, STA engineer, PD lead, or chip integration engineer

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail
• High motivation to learn package design and SI/PI methodologies
• Nice-to-Have Skills
• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Verification Engineer to join our VLSI design and verification team.

This is an excellent opportunity for new graduates with strong academic training in digital design, verification methodologies, and SystemVerilog/UVM.

Responsibilities:

Develop and execute verification testbenches using Verilog/SystemVerilog and UVM

Implement functional and constrained-random tests for block-level and SoC-level designs

Create coverage models (functional, code, assertion-based) and drive coverage closure

Debug simulation failures, interface mismatches, and RTL issues

Write and maintain scoreboards, monitors, agents, drivers, and checkers in UVM

Review design specifications, extract test requirements, and build verification plans

Run regressions, triage failures, and document results

Collaborate closely with RTL designers, DFT, backend, and system architects

Required Qualifications:

B.Sc. or M.Sc. in Electrical/Computer Engineering or related field

Strong academic background in digital logic, computer architecture, and VLSI design

Hands-on experience with Verilog and SystemVerilog (labs, projects, internship)

Basic understanding of UVM methodology

Familiarity with simulation tools (VCS, QuestaSim, Xcelium or similar)

Ability to read and understand RTL code

Good analytical and debugging skills

Strong motivation to grow in advanced functional verification

Nice-to-Have Skills:

Coursework or project experience with UVM testbench development

Familiarity with assertion-based verification (SVA)

Basic scripting (Python, Perl, Shell, TCL)

Experience with coverage-driven verification

Exposure to SoC-level interfaces (AXI, PCIe, DDR, Ethernet, SPI, I2C)

What We Offer:

Full training in modern verification methodologies (UVM, SVA, CRV)

Work with cutting-edge IPs and SoC architectures

Mentorship from senior verification and architecture teams

Clear growth path toward UVM specialist, verification lead, or architect

We are looking for highly motivated junior engineers to join our Design-for-Test (DFT) team.

This is an excellent opportunity for graduates who want to build expertise in Scan, Memory BIST, and JTAG within advanced VLSI development.

Responsibilities:

Learn and support implementation of scan insertion and scan chain architecture

Assist in ATPG pattern generation and test coverage analysis

Participate in Memory BIST (MBIST) integration and verification

Work with JTAG / IEEE 1149.1 boundary scan concepts and flows

Help debug test-related issues at RTL and gate level

Collaborate with senior DFT engineers on SoC-level test strategy

Required Background:

Academic knowledge in digital logic, VLSI design, and computer architecture

Basic familiarity with DFT concepts: scan, ATPG, BIST, boundary scan

Understanding of Verilog or VHDL

Scripting basics (Python, TCL, Shell)

Good analytical and problem-solving skills

Strong motivation to learn industry-standard DFT tools and flows

What We Offer:

Full training in Scan, MBIST, JTAG, ATPG, and DFT methodologies

Mentorship by experienced DFT engineers

Exposure to advanced SoC development flows and signoff

Growth path toward senior DFT, test architecture, or silicon bring-up roles

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

About the Role:

We are seeking a motivated Junior Package Engineer with PCB design experience to join our IC packaging and signal/power integrity team.

You will support the development of advanced semiconductor packages and perform SI/PI analysis for high-speed interfaces such as Ethernet, PCIe, DDR, and SerDes.

Responsibilities:

• Assist in IC package design (substrate layout, stack-up, routing, DRC checks)
• Support package floorplanning and die/ball map development
• Work with senior engineers to run SI simulations (S-parameters, insertion loss, eye diagrams)
• Perform PI/PDN analysis (IR drop, decap planning, impedance profiles)
• Translate PCB experience into package-level routing constraints (differential pair rules, impedance control)
• Help model high-speed interfaces: Ethernet, PCIe, DDR, SerDes
• Collaborate with silicon, system, and PCB teams on end-to-end interconnect design
• Document design guidelines, simulation results, and engineering reports

Required Qualifications:

• Experience with PCB design tools (Altium, OrCAD, Allegro, KiCad, or similar)
• Understanding of high-speed differential routing and board-level signal integrity basics
• Familiarity with impedance control, vias, stackups, return paths, PDN concepts
• Exposure to interfaces such as Ethernet, PCIe, DDR
• Basic scripting or automation skills (Python/Matlab preferred)
• Strong problem-solving abilities and attention to detail

• High motivation to learn package design and SI/PI methodologies

   

  Nice-to-Have Skills

• Familiarity with package design tools: Cadence SIP/APD, Xpeedic, Mentor Xpedition
• Exposure to SI/PI simulation tools: ANSYS SIwave, HFSS, Sigrity, ADS
• Understanding of flip-chip, BGA, RDL, 2.5D/3D packaging

• Knowledge of SerDes, USB, LPDDR, or high-speed PHY design principles

   

What We Offer: 

• Full training in IC packaging, SI/PI analysis, and advanced interconnect design
• Opportunity to work with cutting-edge technologies (PCIe Gen5/6, DDR5/6, chiplets)
• Mentorship from senior package, SI, and system engineers
• A clear growth path toward package architect, SI/PI lead, or chiplet interconnect specialist

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 14, 10, 8, 7 nanometers.

You will be responsible for digital logic design and verification. Besides, you'd be able to learn and improve related methodologies. Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are analytical thinking and ability to learn.

Essential qualifications:

-Degree in Electronics or related fields

-Good understanding of digital electronics

-Experience with EDA tools (Xilinx, Mentor Graphics, Synopsys or similar)

-Beginner’s level of English or higher

Optional qualifications you may have:

-FPGA design using HDL (Verilog, VHDL) or schematics editor

-IC design verification using System Verilog

-CPU architecture knowledge, embedded SW development

We offer:

-Full-time employment, flexible schedule

-On-job training in our Kyiv office with high skilled professionals

-Potential growth in directions of ASIC/FPGA design

-Social benefits, modern and comfortable office facilities

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and RISC-V CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 24, 10, 7,  3 nanometers.

In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.

Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess:

• Good understanding of digital/analog electronics and semiconductors physics
• FPGA placement and routing using EDA tools
• Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
• Basic knowledge of scripting languages such as Tcl, Python, Make
• Beginner’s level of English

Optional skills you may have:

• FPGA design using HDLs or schematics editor
• Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer:

• Part- or full-time employment, flexible schedule
• On-job training in our Kyiv office with high skilled professionals
• Potential growth in the direction of ASIC design
• Paid sick leave and vacation

Description

Our Client is a specialist merchant banking and financial services company, serving clients with tailored lending, financing and investment solutions, primarily across the UK and Ireland. We are seeking an experienced Azure-focused Full-stack Engineer to design, build and support cloud‑based applications and services supporting the Client’s Invoice Finance business unit. The role involves working with architects, engineering teams and operational stakeholders to deliver secure, scalable and high‑performing Azure‑native solutions.

Requirements

• Minimum of 5 years’ experience in developing and deploying cloud-based applications
• Expertise in Python
• Expertise in Azure and its services
• Azure Functions, App Services, Container Apps
• API Management & Application Gateway
• Azure SQL / Cosmos DB
• Azure Queue Storage, Event Grid
• Azure Key Vault, Managed Identities
• Static Web Apps (advantageous)
• Understanding of microservices, and event-driven architectures
• Experience with Azure Monitor, Application Insights, Log Analytics

Desirable Skills (Preferred but not essential)

• Experience in Java and JavaScript
• Building automated CI/CD Pipelines in Azure DevOps.
• Experience in financial services or regulated environments
• Understanding of OAuth2 and API security standards
• Experience integrating third-party APIs
• Familiarity with data governance and secure design practices
• Ability to contribute to high-level design documentation

Job responsibilities

• Design, develop, and deploy cloud applications and APIs using Azure Functions, App Services, Container Apps, API Management, and related Azure PaaS components.
• Integrate Azure services into business workflows, ensuring solutions meet performance, security, and scalability requirements.
• Develop secure, well‑structured APIs and gateways for interfacing with internal and external systems.
• Configure monitoring, telemetry, and diagnostics with Azure Monitor, Application Insights, and Log Analytics.
• Troubleshoot issues across distributed cloud environments to maintain availability.
• Implement authentication and authorization using Microsoft Entra ID.
• Apply secure configuration and secrets management using Azure Key Vault.
• Collaborate with architects, product owners, and cross‑functional teams to translate business needs into Azure-native solutions.

We’re looking for a Middle DevOps Engineer to join our team and take ownership of cloud infrastructure, CI/CD processes, and production stability.
If you’re passionate about building reliable infrastructure, automating everything you can, and ensuring production stays stable and secure - let’s talk.

We offer:

• Flexible working hours;
• Paid vacation and sick days;
• Health insurance;
• Professional growth;
• Internal English classes and compensation for educational courses;
• Professional accountant and lawyer;

• Friendly atmosphere.

   

Requirements:

• 2+ years of commercial DevOps experience;
• Linux administration skills (Windows – nice to have);
• Cloud expertise in AWS (EKS, ECS, EC2, S3, RDS, IAM, VPC), good understanding of cloud networking & security;
• Experience in IaC, CI/CD, and containerization: Terraform, Docker, Kubernetes (EKS/ECS/K8s), Jenkins / GitHub Actions / Bitbucket Pipelines;
• Hands-on GitOps workflows (ArgoCD or FluxCD);
• Scripting: Bash & Python – automation, monitoring, deployment;
• Databases: MySQL, PostgreSQL (admin-level); MongoDB – advantage;
• Monitoring & Logging: Prometheus, Grafana, Loki, Promtail;
• Networking & Security: TCP/IP, VPN, SSL/TLS, firewalls; understanding of DevSecOps principles;
• English – B1 or higher.

Will be a plus:

• Experience with healthcare-grade security (HIPAA, SOC 2, ISO 27001).

We are looking for a Crypto Mining Business Development Manager to expand partnerships within the Russian-speaking crypto mining ecosystem across the CIS region.

This role focuses on building strong relationships with mining farms, mining pools, hosting providers, and infrastructure partners in key mining markets. 

Key Responsibilities

• Develop and execute business development strategies targeting the crypto mining ecosystem in the CIS region.
• Build and maintain partnerships with mining farms, mining pools, hosting providers, and other infrastructure partners.
• Identify new collaboration opportunities related to hashrate, mining services, mining pools, and ecosystem partnerships.
• Maintain long-term relationships with key mining partners and support partner onboarding and integration when required.
• Represent the company at crypto mining conferences, industry events, and community meetups.
• Monitor industry trends including mining economics, hashrate distribution, hardware supply, and regional regulatory developments.
• Collaborate closely with product, marketing, and operations teams to support ecosystem growth and partner initiatives.
• Track partnership performance and provide regular updates on regional business development progress.

Qualifications

• 3+ years of experience in business development, partnerships, or sales within the crypto industry.
• Strong understanding of the cryptocurrency mining ecosystem, including mining pools, mining farms, and mining infrastructure.
• Experience building partnerships with mining-related organizations or ecosystem participants.
• Fluent English with strong communication and negotiation skills.
• Experience working with partners across CIS or emerging crypto markets is highly preferred.
• Self-motivated, results-driven, and comfortable working in a fast-paced remote environment.
• Willingness to travel for industry events, partner meetings, and mining site visits when required.

Nice to Have

• Existing network within the crypto mining community.
• Experience working with crypto exchanges, mining pools, or mining infrastructure companies.
• Understanding of hashrate markets, mining economics, and mining-related financial services.
• Experience working in global crypto companies or remote international teams.
• Knowledge of Russian or other CIS languages is a plus.

Compensation & Benefits

• Competitive base salary.
• Performance-based bonus tied to partnership development and ecosystem growth.
• Opportunity to work closely with leading players in the global crypto mining ecosystem.
• Remote-first work environment with high autonomy.
• Travel opportunities to major crypto and mining industry events.

If this sounds interesting or you know someone in your network - we’d love to hear from you!

We Are Looking for a Backend Developer (PHP)

Technical Skills:

• Strong proficiency in PHP (7.4+).
• Experience with modern PHP frameworks (Laravel, Symfony, Yii).
• Experience working with relational databases (MySQL, PostgreSQL).
• SQL query optimization skills.
• Development and integration of REST APIs and/or GraphQL.
• Understanding of OOP, SOLID principles, and design patterns.
• Experience with version control systems (Git).
• Experience working with Composer.
• Basic understanding of server infrastructure (Linux, Nginx, Apache).

Will Be a Plus:

• Docker (containerization).
• CI/CD tools (Jenkins, GitLab CI, etc.).
• Caching technologies (Redis, Memcached).

Soft Skills:

• Ability to read and maintain existing code.
• Strong teamwork skills.
• Experience working in an Agile/Scrum environment.

Key Responsibilities:

• Development and maintenance of server-side logic for web applications in PHP.
• Database design and optimization.
• API development and integration (REST/GraphQL).
• Writing unit tests.
• Bug fixing and performance optimization.
• Participation in designing the architecture of new and existing systems.
• Preparation and maintenance of technical documentation.
• Collaboration with frontend developers to ensure seamless integration.
• Participation in task planning and estimation.
• Configuration and support of server infrastructure (if required).

Responsibility Areas:

• Timely and high-quality task execution.
• Ensuring correctness and stability of the server-side applications.
• Compliance with coding standards and internal company regulations.
• Ensuring data confidentiality.

The development of our colleagues is the key to the company’s success, which is why we have created the most comfortable working conditions:

• Remote work (office-based work in Sofia, Bulgaria is also possible).
• Working hours: Monday-Friday, 10:00—18:30 (flexible schedule available).
• Official employment or cooperation as a FOP (private entrepreneur).
• Paid vacation and sick leave.